Celeron 2GHz Cache Detection? 28
EAJoe asks: "I have small problem with one Celeron 2GHz machine. Linux kernel 2.4.18-24.7 doesn't seem to switch L2 cache on! This CPU apparently _has_ 128K of L2. There is nothing about L2 in the logs, and /proc/cpuinfo shows an L1D size of 8K instead. Of course I have enabled L2 in BIOS settings (the motherboard is an ASUS P4S533-E, by the way). The CPU overclocks easily up to 3.5 GHz, running stable at 3 - it seems that cache is really switched off. At 3 GHz g++ compilation times are similar to Athlon XP 1800+ machine. I don't have windows on this computer to check this out, but Intel DOS utility shows a Celeron 2000 w/128k L2, also there is '128K' written on the CPU's die. Any suggestions?"
Possible solution and directions to go from here. (Score:5, Insightful)
The first link that returns is an old kernel patch [powerleap.com], specifically for enabling the L2 cache on a Celeron, although with "powerleap", whatever that is. That is something to try though, just make sure you have a backup kernel to boot from.
Also, there was a post to lkml with a similar question here [iu.edu] without a solution.
If you don't find a solution, the best place to post isn't slashdot [slashdot.org] but to LKML [kernel.org].
Re:Possible solution and directions to go from her (Score:2)
"Powerleap" probably refers to the device sold by the company, that allows you to mount certain proc types on motherboards that wouldn't accept them otherwise, either because of different pinouts or whatever reason (IIRC even one where the voltages were different?), within certain limits (I don't think they sell anything that allows you to plug an 486 into a Socket A slot
Re:Possible solution and directions to go from her (Score:1)
compilation times without a cache? (Score:2, Interesting)
Try running a test that repeatedly accesses a block of memory 124, 125, 126, 127, 128 etc. KB in size. If you see a significant drop in speed when the block size grows above 128, you probably have your cache.
Anyway, is it the _kernel_'s job to turn on the cache? Isn't that supposed to be the BIOS' job?
Re:compilation times without a cache? (Score:2, Informative)
I agree, it should really be the BIOS' job to turn on the cache, and there were some references to buggy BIOSes in the minor searching I did.
Re:compilation times without a cache? (Score:1)
processor : 0
vendor_id : GenuineIntel
cpu family : 15
model : 1
model name : Intel(R) Celeron(R) CPU 1.80GHz
stepping : 3
cpu MHz : 1800.328
cache size : 8 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 2
wp : yes
flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm
bogomips : 3591.37
Re:compilation times without a cache? (Score:1)
Re:compilation times without a cache? (Score:2)
Re:compilation times without a cache? (Score:1)
Re:YHO YL HAND (Score:1)
Re:A Suggestion for cliff... (Score:1)
Similar.... (Score:1)
Dont know if its related but yea......
Re:Similar.... (Score:2)
Please benchmark with cache turned off in BIOS (Score:2)
Hey, Thanks, Slashdot! (Score:2)
Inspired by this thread, I double-checked one of my systems, found that the L2 cache wasn't being picked up because of a BIOS bug, flashed the BIOS with the newest version and got an instant, free speed boost on an aging machine.
Thanks, slashdot!
Re:Frys Christmas Deal - Celeron 2Ghz w/ECS P4VXAS (Score:1)